The deposition of tungsten films using chemical vapor deposition (CVD) techniques is an integral part of many semiconductor fabrication processes. Tungsten films may be used as low resistivity electrical connections in the form of horizontal interconnects, vias between adjacent metal layers, and contacts between a first metal layer and the devices on the silicon substrate. In a conventional tungsten deposition process, the wafer is heated to the process temperature in a vacuum chamber, and then a very thin portion of tungsten film, which serves as a seed or nucleation layer, is deposited. Thereafter, the remainder of the tungsten film (the bulk layer) is deposited on the nucleation layer. Conventionally, the tungsten bulk layer is formed by the reduction of tungsten hexafluoride (WF6) with hydrogen (H2) on the growing tungsten layer.
As semiconductor devices scale to the 32 nm technology node and beyond, shrinking contact and via dimensions make chemical vapor deposition of tungsten more challenging. Increasing aspect ratios can lead to voids or large seams within device features, resulting in lower yields and decreased performance in microprocessor and memory chips. The International Technology Roadmap for Semiconductors (ITRS) calls for 32 nm stacked capacitor DRAM contacts to have aspect ratios of greater than 20:1. Logic contacts, though not as aggressive as DRAM contacts, will still be challenged as aspect ratios grow to more than 10:1. Void-free fill in aggressive features like these is problematic using conventional CVD tungsten deposition techniques.